RDNA 2

RDNA 2 is a GPU microarchitecture designed by AMD, released with the Radeon RX 6000 series on November 18, 2020. Alongside powering the RX 6000 series, RDNA 2 is also featured in the SoCs designed by AMD for the PlayStation 5, Xbox Series X/S, and Steam Deck consoles.

Background On July 7, 2019, AMD released the first iteration of the RDNA microarchitecture, a new graphics architecture designed specifically for gaming that replaced the aging Graphics Core Next (GCN) microarchitecture. With RDNA, AMD sought to reduce latency and improve power efficiency over their previous Vega series based on GCN 5th gen and Nvidia's competing Turing microarchitecture.

RDNA 2 was first publicly announced in January 2020 with AMD initially calling RDNA 2 a "refresh" of the original RDNA architecture from the previous year. At AMD's Financial Analysts Day held on March 5, 2020, AMD showed a client GPU roadmap that gave details on RDNA's successor, RDNA 2, that it would again be built using TSMC's 7 nm process and would be coming in 2020. AMD told their investors that they were targeting a 50% uplift in performance-per-watt and increased IPC with the RDNA 2 microarchitecture.

On October 28, 2020, AMD held an online unveiling event for the RDNA 2 architecture and Radeon RX 6000 series. The event came 20 days after AMD's unveiling event for Ryzen 5000 series processors built on the Zen 3 microarchitecture.

Architectural details Compute Unit RDNA 2 contains a significant increase in the number of Compute Units (CUs) with a maximum of 80, a doubling from the maximum of 40 in the Radeon RX 5700 XT. Each Compute Unit contains 64 shader cores. CUs are organized into groups of two named Work Group Processors with 32KB of shared L0 cache per WGP. Each CU contains two sets of an SIMD32 vector unit, an SISD scalar unit, textures units, and a stack of various caches. New low precision data types like INT4 and INT8 are new supported data types for RDNA 2 CUs.

The RDNA 2 graphics pipeline has been reconfigured and reordered for greater performance-per-watt and more efficient rendering by moving the caches closer to the shader engines. A new mesh shaders model allows shader rendering to be done in parallel using smaller batches of primitives called "meshlets". As a result, the mesh shaders feature enables greater control of the GPU geometry pipeline.

Ray tracing Real-time hardware accelerated ray tracing is a new feature for RDNA 2 which is handled by a dedicated ray accelerator inside each CU. Ray tracing on RDNA 2 relies on the more open DirectX Raytracing protocol rather than the Nvidia RTX protocol.

In February 2023, it was reported that driver updates had boosted ray tracing performance by up to 40% using DirectX Raytracing.

Clock speeds With RDNA 2 using the same 7 nm node as RDNA, AMD claims that RDNA 2 achieves a 30% frequency increase over its predecessor while using the same power.

Cache and memory subsystem In addition to the traditional L1 and L2 caches that GPUs possess, RDNA 2 adds a new global L3 cache that AMD calls "Infinity Cache". This was done to avoid the use of a wider memory bus while still being able to maintain the same data bandwidth. Product technology architect Sam Naffziger said that, without Infinity Cache, "We were looking at the daunting prospect of having to put a 512-bit interface and all the power, area and expense associated with that". Using a wider memory bus requires more power which is in conflict with AMD's increased performance-per-watt goals for RDNA 2. AMD engineers ran tests comparing RDNA 2 silicon featuring a large on-die cache and with wider memory buses. They discovered that having such a cache would aid in the re-use of temporal and spatial data when the GPU is rendering a complex image. It is beneficial for the GPU's compute units to have fast access to a physically close cache rather than searching for data in video memory. AMD claims that RDNA 2's 128MB of on-die Infinity Cache "dramatically reduces latency and power consumption". The GPU having access to a large L2 or L3 cache allows it to more quickly access necessary data compared to accessing VRAM or system RAM. The Infinity Cache is made up of two sets of 64MB cache that can run on its own clock rate independent from the GPU cores. The Infinity Cache has a peak internal transfer bandwidth of 1986.6 GB/s and results in less reliance being placed on the GPU's GDDR6 memory controllers. Each Shader Engine now has two sets of L1 caches. The large cache of RDNA 2 GPUs give them a higher overall memory bandwidth compared to Nvidia's GeForce RTX 30 series GPUs.

Power efficiency AMD claims that RDNA 2 achieves up to a 54% increase in performance-per-watt over the first RDNA microarchitecture. 21% of that 54% improvement is attributed to performance-per-clock enhancements, in part due to the addition of Infinity Cache.

Media engine RDNA 2 uses the VCN 3.0, VCN 3.1, and VCN 3.1.2 video decoding blocks in its media engine. It adds support for AV1 decoding at up to 8K resolution, though AV1 hardware encoding support would not come until RDNA 3 in 2022. However, the low-end Navi 24 die and iGPUs based on RDNA 2.0 do not contain any media encoders and cannot decode AV1 as a result.

Navi 2x dies Navi 21 Navi 22 Navi 23 Navi 24 Sienna Cichlid Navy Flounder Dimgrey Cavefish Beige Goby 80 (5120) [10240] 40 (2560) 32 (2048) 16 (1024) TSMC N7 TSMC N6 26.8B 17.2B 11.06B 5.4B 51.5 MTr/mm2 51.3 MTr/mm2 46.7 MTr/mm2 50.5 MTr/mm2 520 mm2 335 mm2 237 mm2 107 mm2 400W 250W 176W 107W rowspan="2"

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Integrated graphics processing units (iGPUs) Model Launch Codename Architecture & fab Diesize Core Fillrate Processing power(GFLOPS) Cache TDP CPUs/APUs Config Clock (MHz) Texture (GT/s) Pixel (GP/s) Half Single Double L0 L1 L2 Radeon Graphics Raphael / Granite Ridge RDNA 2 TSMCN6 122mm2 2 CU 128:8:4:2 400 2200 3.2 17.6 1.6 8.8 204.8 1126.4 102.4 563.2 6.4 35.2 32KB 128KB 2MB 65–170W Ryzen 7000 & 9000 series Dragon Range / Fire Range 45–75W Ryzen 704xHX & 905xHX series Mendocino 100mm2 1500 1900 12.0 15.2 6.0 7.6 768 972.8 384 486.4 24 30.4 15W Ryzen 7020 series Rembrandt 208mm2 6 CU 384:24:16:6 1500 1900 36.0 45.6 24.0 30.4 2304 2918.4 1152 1459.2 72 91.2 96KB 384KB 28–54W Ryzen 6000 series Ryzen 7035 series 12 CU 768:48:32:12 2000 2200 96.0 105.6 64.0 70.4 6144 6758.4 3072 3379.2 192 211.2 192KB 768KB 15–54W

Consoles Model Launch Codename Architecture Fab rowspan="2" Diesize Core Fillrate Processing power(TFLOPS) Cache Memory TDP Config Clock (MHz) Texture (GT/s) Pixel (GP/s) Half Single Double L0 L1 L2 L3 Type Size Bandwidth (GB/s) Bus width MemoryClock(Gb/s) Aerith RDNA 2 TSMCN7 2.4 163mm2 8 CU 512:32:16:8 1000 1600 32.0 51.2 16.0 25.6 2 3.2 1 1.6 0.063 0.1 128KB 512KB 1MB 8MB LPDDR5 16GB 88 128-bit 5.5 15W Sephiroth TSMCN6 131mm2 102.4 6.4 Project Lockhart TSMCN7 8.0 197mm2 20 CU 1280:80:32:20 1565 125.2 50.08 8.013 4.006 0.25 320KB 1.25MB 2MB rowspan="5" GDDR6 8GB 224 14.0 100W Project Scarlett 15.3 360mm2 52 CU 3328:208:64:52 1825 379.6 116.8 24.294 12.147 0.759 832KB 3.25MB 5MB 10GB 560 320-bit 200W TSMCN6 313mm2 Oberon TSMCN7 10.6 308mm2 36 CU 2304:144:64:36 2233 321.552 142.912 20.579 10.29 0.643 576KB 2.25MB 4MB 16GB 448 256-bit 180W Oberon Plus TSMCN6 264mm2

See also Ampere - competing Nvidia microarchitecture released in a similar time-frame with the competing GeForce RTX 30 series

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