The KOMDIV-32 () is a family of 32-bit microprocessors developed and manufactured by the Scientific Research Institute of System Development (NIISI) of the Russian Academy of Sciences. The manufacturing plant of NIISI is located in Dubna on the grounds of the Kurchatov Institute. The KOMDIV-32 processors are intended primarily for spacecraft applications and many of them are radiation hardened (rad-hard).
These microprocessors are compatible with MIPS R3000 and have an integrated MIPS R3010 compatible floating-point unit.
Overview DesignationProduction start (year)Process (nm)Clock rate (MHz)RemarksRussianEnglish1В8121V812 ?500331890ВМ1Т1890VM1T200050050rad-hard1890ВМ2Т1890VM2T2003350901990ВМ2Т1990VM2T2008 ?35066rad-hard5890ВМ1Т5890VM1Т200950033rad-hard5890ВЕ1Т5890VE1Т200950033rad-hard1900ВМ2Т1900VM2T201235066rad-hard1904ВЕ1Т1904VE1T2016350401907ВМ0141907VM0142016250100rad-hard1907ВМ0381907VM0382016 ?250125rad-hard1907ВМ0441907VM0442016 ?25066rad-hard1907ВМ0561907VM0562016 ?250100rad-hard1907ВМ0661907VM0662016 ?250100rad-hard1907ВК0161907VK016 ?250100rad-hard
Details 1V812 0.5 μm CMOS process, 3-layer metal 108-pin ceramic quad flat package (QFP) 1.5 million transistors, 8KB L1 instruction cache, 8KB L1 data cache, compatible with IDT 79R3081E
1890VM1T 0.5 μm CMOS process
1890VM2T 0.35 μm CMOS process
1990VM2T 0.35 μm silicon on insulator (SOI) CMOS process 108-pin ceramic Quad Flat Package (QFP) working temperature from -60 to 125 °C
5890VM1Т 0.5 μm silicon on insulator (SOI) CMOS process 108-pin ceramic quad flat package (QFP) cache (8KB each for data and instructions) working temperature from -60 to 125 °C
5890VE1Т 0.5 μm SOI CMOS process 240-pin ceramic QFP radiation tolerance to not less than 200 kRad, working temperature from -60 to 125 °C System-on-a-chip (SoC) including PCI master / slave, 16 GPIO, 3 UART, 3 32-bit timers cache (8KB each for data and instructions) second-sourced by MVC Nizhny Novgorod under the name 1904VE1T () with a clock rate of 40 MHz
1900VM2T development name Rezerv-32 0.35 μm SOI CMOS process 108-pin ceramic QFP radiation tolerance to not less than 200 kRad, working temperature from -60 to 125 °C triple modular redundancy on block level with self-healing both registers and cache (4KB each for data and instructions) are implemented as dual interlocked storage cells (DICE)
1907VM014 0.25 μm SOI CMOS process; manufacturing to be moved to Mikron 256-pin ceramic QFP production planned for 2016 (previously this device was planned to go into production in 2014 under the name 1907VE1T or 1907VM1T) radiation tolerance to not less than 200 kRad SoC including SpaceWire, GOST R 52070-2003 (Russian version of MIL-STD-1553), SPI, 32 GPIO, 2 UART, 3 timers, JTAG cache (8KB each for data and instructions)
1907VM038 development name Skhema-10 0.25 μm SOI CMOS process; manufacturing to be moved to Mikron 675-pin ceramic BGA SoC including SpaceWire, GOST R 52070-2003 (MIL-STD-1553), RapidIO, SPI, I²C, 16 GPIO, 2 UART, 3 32-bit timers, JTAG, DSP (same command set as DSP in 1890VM7Ya) DDR2 SDRAM controller with ECC cache (8KB each for data and instructions) working temperature from -60 to 125 °C
1907VM044 development name Obrabotka-10 0.25 μm SOI CMOS process; manufactured by Mikron 256-pin ceramic QFP SoC including SpaceWire, GOST R 52070-2003 (MIL-STD-1553), SPI, 32 GPIO, 2 UART, 3 timers, JTAG radiation tolerance to not less than 200 kRad triple modular redundancy in processor core both registers and cache (4KB each for data and instructions) are implemented as dual interlocked storage cells (DICE) with 1 parity bit per byte for cache and Hamming code for registers SECDED for external memory working temperature from -60 to 125 °C
1907VM056 development name Skhema-23 0.25 μm SOI CMOS process; manufactured by Mikron 407-pin ceramic PGA SoC including 8-channel SpaceWire, GOST R 52070-2003 (MIL-STD-1553), SPI, I²C, CAN bus, 32 GPIO, 2 UART, 3 timers, JTAG cache (8KB each for data and instructions)
1907VM066 development name Obrabotka-26 0.25 μm silicon on insulator (SOI) CMOS process; manufactured by Mikron 407-pin ceramic PGA SoC including 4-channel SpaceWire, GOST R 52070-2003 (MIL-STD-1553), SPI, I²C, RapidIO, GPIO, 2 UART, 3 timers, JTAG, PCI, co-processor for image processing cache (8KB each for data and instructions)
1907VK016 development name Obrabotka-29 0.25 μm silicon on insulator (SOI) CMOS process; manufactured by Mikron PGA SoC including 4-channel SpaceWire, GOST R 52070-2003 (MIL-STD-1553), SPI, 32 GPIO, 2 UART, 3 timers, 128KB SRAM triple modular redundancy in processor core
See also KOMDIV-64, 64-bit MIPS processors developed by NIISI Mongoose-V, a 32-bit MIPS processor for spacecraft applications developed for NASA Soviet integrated circuit designation
References