ANTIC

Alphanumeric Television Interface Controller (ANTIC) is an LSI ASIC dedicated to generating 2D computer graphics to be shown on a television screen or computer display.

Under the direction of Jay Miner, the chip was designed in 1977–1978 by Joe Decuir, Francois Michel, and Steve Smith for the Atari 8-bit computers first released in 1979. The chip was patented by Atari, Inc. in 1981. ANTIC is also used in the 1982 Atari 5200 video game console, which shares most of the same hardware as the 8-bit computers.

For every frame of video, ANTIC reads instructions to define the playfield, or background graphics, then delivers a data stream to the companion CTIA or GTIA chip which adds color and overlays sprites (referred to as "Player/Missile graphics" by Atari). Each ANTIC instruction corresponds to either blank scan lines or one of 14 graphics modes used for a horizontal band of the display. The height of each band depends on the mode. The instructions comprise a display list, in Atari parlance, which specifies how the entire display is built from a stack of individual modes.

The display list specifies where the data for each row comes from. For character modes, the base address of the character bitmaps is stored in an on-chip register and can be changed. Display list instructions can enable horizontal and vertical fine scrolling and mark that an interrupt should occur. An interrupt allows arbitrary 6502 code to execute, usually to change display-related settings in the middle of a frame.

Atari computer magazine Antic was named after the chip.

Features The list below describes ANTIC's inherent hardware capabilities meaning the intended functionality of the hardware by itself, not including results achieved by CPU-serviced interrupts or display kernels frequently driving register changes.

ANTIC uses DMA to read a program called the display list which specifies these playfield features: 14 different graphics modes 6 character modes 4 types of font/glyph rendering 8 bitmapped modes Output a variable number of blank scan lines Playfield Text and Map modes can be mixed onscreen Variable screen height up to vertical overscan Horizontal and Vertical coarse scrolling Identify sections of the display subject to Horizontal and/or Vertical Fine scrolling Trigger a CPU-serviced interrupt routine, called the "Display List Interrupt", at specific scan lines (also called "raster interrupt" or "Horizontal Blank Interrupt" on other systems) Trigger a CPU-serviced interrupt routine, called the "Vertical Blank Interrupt", at the end of the display frame.

Other register-based functions: Variable screen width up to horizontal overscan Define the distance of movement for Horizontal and Vertical Fine scrolling Provides real-time information of the electron beam's vertical screen location. Reads a light pen horizontal/vertical coordinates (CRT only) Soft, re-definable character set. Adjustable display of inverse video characters. Characters may be vertically reflected. Control the display-oriented Vertical Blank and Display List interrupts, and the Reset key interrupt. Performs DMA for CTIA/GTIA to produce Player/Missile graphics (aka sprites) Non-fixed RAM. This allows RAM for graphics features to be located almost anywhere in the 16-bit memory address range. This applies to: Display lists. Playfield graphics data Character set fonts Player/Missile graphics data

Versions Listed by part number. C012296 — NTSC: Used in Atari 400, 800, and 1200XL computers, and the Atari 5200Michael Current, "What are the SALLY, ANTIC, CTIA/GTIA, POKEY, and FREDDIE chips?", Atari 8-Bit Computers: Frequently Asked Questions C014887 — PAL/SECAM: Used in Atari 400 and 800 computers. C021697 — NTSC: Used in Atari 600XL, 800XL, and XE models. C021698 — PAL/SECAM: Used in Atari XL, and XE models.

Atari, Inc. intended to combine functions of the ANTIC and GTIA chips in one integrated circuit to reduce production costs of Atari computers and 5200 consoles. Two such prototype circuits were being developed, but neither entered production.

C020577 — CGIA C021737 — KERI

Pinout

Pin name Pin number(s) Description A0 - A15 13, 12, 11, 10, 28, 27, 26, 25, 24, 23, 16, 22, 17, 18, 19, 20 Memory address I/O AN0 – AN2 2, 3, 5 ANTIC interface to CTIA/GTIA D0 – D7 30, 31, 32, 33, 40, 39, 38, 37 Data bus I/O FØ0 35 Fast phase 0 input clock HALT 9 Halt output (suspends CPU while ANTIC reads memory) LP 4 Light pen input NMI 7 NMI interrupt output to CPU RDY 15 Ready output. ANTIC pulls pin low to halt the CPU for horizontal blank syncing (WSYNC) REF 8 RAM refresh output RNMI 6 NMI interrupt input RST 36 Reset ANTIC input R/W 14 Read/write I/O direction Vcc 21 Power +5 volts Vss 1 Ground Ø0 34 Phase 0 clock output Ø2 29 Phase 2 input clock

Registers The Atari 8-bit computers and the Atari 5200 console map the ANTIC chip to the $D4xxhex page.

ANTIC provides 15 Read/Write registers controlling Playfield display parameters, DMA for Player/Missile graphics, fine scrolling, light pen input, and interrupts. Hardware registers do not return the written values back when read. This problem is solved by Operating System Shadow registers implemented in regular RAM as places to store the last value written to registers. Operating System Shadow registers are copied from RAM to the hardware registers during the vertical blank. Therefore, any writes to hardware registers which have corresponding shadow registers will be overwritten by the value of the Shadow registers during the next vertical blank.

Some Write hardware registers do not have corresponding Shadow registers. They can be safely written by an application without the value being overwritten during the vertical blank. If the application needs to know the last state of the register then it is the responsibility of the application to remember what it wrote.

Operating System Shadow registers also exist for some Read registers where reading the value directly from hardware at an unknown stage in the display cycle may return inconsistent results.

Name Description Read/Write Hex Addr Dec Addr Shadow Name Shadow Hex Addr Shadow Dec Addr DMACTL Direct Memory Access Control Write $D400 54272 SDMCTL $022F 559 CHACTL Character Control Write $D401 54273 CHART $02F3 755 DLISTL Display List Pointer (low byte) Write $D402 54274 SDLSTL $0230 560 DLISTH Display List Pointer (high byte) Write $D403 54275 SDLSTH $0231 561 HSCROL Horizontal Fine Scroll Write $D404 54276 VSCROL Vertical Fine Scroll Write $D405 54277 PMBASE Player/Missile Base Address Write $D407 54279 CHBASE Character Set Base Address Write $D409 54281 CHBAS $02F4 756 WSYNC Wait for Horizontal Sync Write $D40A 54282 VCOUNT Vertical Line Counter Read $D40B 54283 PENH Light Pen Horizontal Position Read $D40C 54284 LPENH $0234 564 PENV Light Pen Vertical Position Read $D40D 54285 LPENV $0235 565 NMIEN Non-Maskable Interrupt (NMI) Enable Write $D40E 54286 NMIRES Non-Maskable Interrupt (NMI) Reset Write $D40F 54287 NMIST Non-Maskable Interrupt (NMI) Status Read $D40F 54287

In the individual register listings below the following legend applies: Bit Value Description 0 Bit must be 0 1 Bit must be 1 ? Bit may be either 0 or 1, and is used for a purpose. - Bit is unused, or should not be expected to be a certain value label Refer to a later explanation for the purpose of the bit.

DMACTL $D400 Write SHADOW: SDMCTL $022F

Direct Memory Access (DMA) Control

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 - - Display List DMA Player Missile Resolution Player DMA Missile DMA Playfield Width Playfield Width

DMACTL controls ANTIC's DMA behavior for the Playfield and Player-Missile (sprite) graphics.

Playfield Width bit values: Playfield Width Bits [1:0] Description Size 0 0 = $00 Disable playfield 0 1 = $01 Narrow playfield 128 color clocks/256 high-res pixels 1 0 = $02 Normal playfield 160 color clocks/320 high-res pixels 1 1 = $03 Wide playfield 192 color clocks/384 high-res pixels

Also see Display List DMA bit regarding Playfield display.

Player/Missile DMA bits values: Player/Missile DMA Bits [3:2] Description 0 0 = $00 Disable Player and Missile DMA 0 1 = $04 Enable Missile DMA 1 0 = $08 Enable Player DMA 1 1 = $0C Enable Player and Missile DMA

ANTIC's Player/Missile DMA feature reads bytes from memory and delivering data to update CTIA/GTIA's GRAFP0, GRAFP1, GRAFP2, GRAFP3, and GRAFM graphics pattern registers relieving the CPU from creating Player/Missile (sprite) graphics. These bits turn on ANTIC's transmission of Player data and Missile data to CTIA/GTIA. CTIA/GTIA must also be configured to receive the data via its GRACTL register in order for Player/Missile DMA to function as expected.

When Player DMA is enabled, Missile DMA automatically occurs to keep the DMA timing consistent, but the data is not delivered to the Missile's GRAFM register.

When enabled, Player/Missile DMA occurs on every scan line in the visible display—from scan line 8 to 247. Therefore, the Player/Missile data in the memory map (see ANTIC's PMBASE) above and below those scan line counts is unused and undisplayed.

Player/Missile Resolution bit values: $00 - Double line resolution. ANTIC updates its DMA fetch address every other scan line and updates the CTIA/GTIA Player/Missile Graphics pattern registers every scan line, so that each Player/Missile byte pattern is two scan lines tall. When Double line resolution is enabled CTIA/GTIA register VDELAY ($D01Chex/53276dec) works by masking updates on even scan lines which results in shifting the bit pattern of individual Players and Missiles down one scan line. $10 - Single line resolution. A DMA fetch and Player/Missile register update occurs on every scan line. CTIA/GTIA register VDELAY ($D01Chex/53276dec) which masks updates on even scan lines effectively reduces Single line resolution to Double line resolution.

ANTIC DMA and Player/Missile pattern register updates occur on each scan line regardless of resolution. When Double line resolution is in effect the Player/Missile memory can be modified between the redundant DMA fetches thus changing the pattern sent to the GRAF* registers and producing apparent Single line resolution Player/Missiles.

Display List DMA bit values: $00 - Disable Display List. $20 - Enable Display list.

Playfield display requires that Display List DMA is enabled, and a Playfield width specified. If either value is zero, then no Playfield display is generated.

CHACTL $D401 Write SHADOW: CHART $02F3

Character Control

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 - - - - - Video Reflect Video Inverse Video Blank

CHACTL controls character display.

Character control bit values do the following actions:

Feature Bits Value Description Video Blank $01 Inverse video characters display as blanks spaces. Video Inverse $02 Inverse video characters appear as inverse video. (default) Video Reflect $04 All characters are displayed vertically mirrored.

The CHACTL Video Inverse and Video Blank bits affect the display of characters in ANTIC Text Modes 2 and 3 which have the high bit set (characters $80 through $FF). Toggling the values of the CHACTL bits allow blinking or blanking these characters globally for the entire display.

Video Inverse and Video Blank enabled together result in reverse video characters displayed as an inverse blank space. Video Inverse and Video Blank bits work in ANTIC modes 2 and 3, and have no effect on the other text modes 4, 5, 6, and 7.

The Video Reflect bit affects all Text Modes. Video Reflect is useful for situations requiring mirroring effects without defining a new character set. An ideal use is card games displaying accurate card faces showing upside down suits. As this vertically mirrors the glyph data before it is used, the effect appears inconsistent for ANTIC Mode 3 descenders with glyph bytes 6 and 7 appearing at the bottom of the descender area.

DLISTL/DLISTH $D402/$D403 Write