SIMM

A SIMM (single in-line memory module) is a type of memory module used in computers from the early 1980s to the early 2000s. It is a printed circuit board upon which multiple random-access memory Integrated circuit chips are attached to one or both sides. It differs from a dual in-line memory module (DIMM), the most predominant form of memory module since the late 1990s, in that the contacts on a SIMM are redundant on both sides of the module. SIMMs were standardised under the JEDEC JESD-21C standard.

Most early PC motherboards (8088-based PCs, XTs, and early ATs) used socketed DIP chips for DRAM. As computer memory capacities grew, memory modules were used to save motherboard space and ease memory expansion. Instead of plugging in eight or nine single DIP chips, only one additional memory module was needed to increase the memory of the computer.

History SIMMs were invented in 1983 by James E. ClaytonClayton, James E. (1983). Low-cost, high-density memory packaging: A 64K X 9 DRAM SIP module, The International journal for hybrid microelectronics. at Wang Laboratories with subsequent patents granted in 1987. - Single in-line memory module - Signal in-line memory module Wang Laboratories litigated both patents against multiple companies. The original memory modules were built upon ceramic substrates with 64K Hitachi "flip chip" parts and had pins, i.e. single in-line package (SIP) packaging. SIMMs using pins are usually called SIP or SIPP memory modules to distinguish them from the more common modules using edge connectors.

The first variant of SIMMs has 30 pins and provides 8 bits of data (plus a 9th error-detection bit in parity SIMMs). They were used in some 286-based, IBM PC–compatible computers (e.g. Wang APCWang Plays A Strong PC-Compatible Hand, PC Magazine, October 1, 1985), 386-based PC compatibles, 486-based PC compatibles, the Macintosh Plus, the Macintosh II, the Macintosh Quadra series, the Atari STE, Wang VS minicomputers and Roland electronic samplers.

The second variant of SIMMs has 72 pins and provides 32 bits of data (36 bits in parity and ECC versions). These appeared first in the late 1980s with the IBM PS/2, specifically the Model 50 Z and the Model 70. It later became ubiquitous on systems based on the 486, Pentium, Pentium Pro, early Pentium II, and contemporary/competing chips of other brands. By the mid-90s, 72-pin SIMMs had replaced 30-pin SIMMs in new-build computers, and were starting to themselves be replaced by DIMMs.

Non-IBM PC computers such as UNIX workstations may use proprietary non-standard SIMMs. The Macintosh IIfx uses proprietary non-standard SIMMs with 64 pins.

DRAM technologies used in SIMMs include FPM (Fast Page Mode memory, used in all 30-pin and early 72-pin modules), and the higher-performance EDO DRAM (used in later 72-pin modules).

Due to the differing data bus widths of the memory modules and some processors, sometimes several modules must be installed in identical pairs or in identical groups of four to fill a memory bank. The rule of thumb is a 286, 386SX, 68000 or low-end 68020 / 68030 (e.g. Atari Falcon, Mac LC) system (using a 16 bit wide data bus) would require two 30-pin SIMMs for a memory bank. On 386DX, 486, and full-spec 68020 through 68060 (e.g. Atari TT, Amiga 4000, Mac II) systems (32 bit data bus), either four 30-pin SIMMs or one 72-pin SIMM are required for one memory bank. On Pentium systems (data bus width of 64 bits), two 72-pin SIMMs are required. However, some Pentium systems have support for a "half bank mode", in which the data bus would be shortened to only 32 bits to allow operation of a single SIMM. Conversely, some 386 and 486 systems use what is known as "memory interleaving", which requires twice as many SIMMs and effectively doubles the bandwidth.

The earliest SIMM sockets were conventional push-type sockets. These were soon replaced by ZIF sockets in which the SIMM was inserted at an angle, then tilted into an upright position. To remove one, the two metal or plastic clips at each end must be pulled to the side, then the SIMM must be tilted back and pulled out (low-profile sockets reversed this convention somewhat, like SODIMMs - the modules are inserted at a "high" angle, then pushed down to become more flush with the motherboard). The earlier sockets used plastic retainer clips which were found to break, so steel clips replaced them.

Some SIMMs support presence detect (PD). Connections are made to some of the pins that encode the capacity and speed of the SIMM, so that compatible equipment can detect the properties of the SIMM. PD SIMMs can be used in equipment which does not support PD; the information is ignored. Standard SIMMs can easily be converted to support PD by fitting jumpers, if the SIMMs have solder pads to do so, or by soldering wires on.

30-pin SIMMs

Standard sizes: 256 KB, 1 MB, 4 MB, 16 MB.

30-pin SIMMs have 12 address lines, which can provide a total of 24 address bits. With an 8-bit data width, this leads to an absolute maximum capacity of 16 MB for both parity and non-parity modules (the additional redundancy-bit chip usually does not contribute to the usable capacity). + 30-pin SIMMPin # Name Signal descriptionPin # Name Signal description1VCC+5 VDC16DQ4Data 42/CASColumn address strobe17A8Address 83DQ0Data 018A9Address 94A0Address 019A10Address 105A1Address 120DQ5Data 56DQ1Data 121/WEWrite enable7A2Address 222VSSGround8A3Address 323DQ6Data 69VSSGround24A11Address 1110DQ2Data 225DQ7Data 711A4Address 426QP*Data parity out12A5Address 527/RASRow address strobe13DQ3Data 328/CASP*Parity column address strobe14A6Address 629DP*Data parity in15A7Address 730VCC+5 VDC * Pins 26, 28 and 29 are not connected on non-parity SIMMs.

72-pin SIMMs

Standard sizes: 1 MB, 2 MB, 4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB (the standard also defines 3.3 V modules with additional address lines and up to 2 GB)

With 12 address lines, which can provide a total of 24 address bits, two ranks of chips, and 32-bit data output, the absolute maximum capacity is 227 = 128 MB.

+5 V 72-pin SIMMPin #NameSignal descriptionPin #NameSignal description1VSSGround37MDP1*Data parity 1 (MD8..15)2MD0Data 038MDP3*Data parity 3 (MD24..31)3MD16Data 1639VSSGround4MD1Data 140/CAS0Column address strobe 05MD17Data 1741/CAS2Column address strobe 26MD2Data 242/CAS3Column address strobe 37MD18Data 1843/CAS1Column address strobe 18MD3Data 344/RAS0Row address strobe 09MD19Data 1945/RAS1†Row address strobe 110VCC+5 VDC46NCNot connected 11NU [PD5#]Not used [presence detect 5 (3v3)]47/WERead/write enable12MA0Address 048NC [/ECC#]Not connected [ECC presence (if grounded) (3v3)]13MA1Address 149MD8Data 814MA2Address 250MD24Data 2415MA3Address 351MD9Data 916MA4Address 452MD25Data 2517MA5Address 553MD10Data 1018MA6Address 654MD26Data 2619MA10Address 1055MD11Data 1120MD4Data 456MD27Data 2721MD20Data 2057MD12Data 1222MD5Data 558MD28Data 2823MD21Data 2159VCC+5 VDC24MD6Data 660MD29Data 2925MD22Data 2261MD13Data 1326MD7Data 762MD30Data 3027MD23Data 2363MD14Data 1428MA7Address 764MD31Data 3129MA11Address 1165MD15Data 1530VCC+5 VDC66NC [/EDO#]Not connected [EDO presence (if grounded) (3v3)]31MA8Address 867PD1xPresence detect 132MA9Address 968PD2xPresence detect 233/RAS3†Row address strobe 369PD3xPresence detect 334/RAS2Row Address Strobe 270PD4xPresence detect 435MDP2*Data parity 2 (MD16..23)71NC [PD (ref)#]Not connected [presence detect (ref) (3v3)]36MDP0*Data parity 0 (MD0..7)72VSSGround * Pins 35, 36, 37 and 38 are not connected on non-parity SIMMs. † /RAS1 and /RAS3 are only used on two-rank SIMMS: 2, 8, 32, and 128 MB. # These lines are only defined on 3.3 V modules. x Presence-detect signals are detailed in JEDEC standard.

Proprietary SIMMs

GVP 64-pin Several CPU cards from Great Valley Products for the Commodore Amiga used special 64-pin SIMMs (32 bits wide, 1, 4 or 16 MB, 60 ns).

Apple 64-pin Dual-ported 64-pin SIMMs were used in Apple Macintosh IIfx computers to allow overlapping read/write cycles (1, 4, 8, 16 MB, 80 ns).Macintosh IIfx.

+ 5V 64-pin Mac IIfx SIMMPin #NameSignal descriptionPin #NameSignal description1GNDGround33Q4Data output bus, bit 42NCNot connected34/W4Write-enable input for RAM IC 43+5V+5 volts35A8Address bus, bit 84+5V+5 volts36NCNot connected5/CASColumn address strobe37A9Address bus, bit 96D0Data input bus, bit 038A10Address bus, bit 107Q0Data output bus, bit 039A11Address bus, bit 118/W0Write-enable input for RAM IC 040D5Data input bus, bit 59A0Address bus, bit 041Q5Data output bus, bit 510NCNot connected42/W5Write-enable input for RAM IC 511A1Address bus, bit 143NCNot connected12D1Data input bus, bit 144NCNot connected13Q1Data output bus, bit 145GNDGround14/W1Write-enable input for RAM IC 146D6Data input bus, bit 615A2Address bus, bit 247Q6Data output bus, bit 616NCNot connected48/W6Write-enable input for RAM IC 617A3Address bus, bit 349NCNot connected18GNDGround50D7Data input bus, bit 719GNDGround51Q7Data output bus, bit 720D2Data input bus, bit 252/W7Write-enable input for RAM IC 721Q2Data output bus, bit 253/QBReserved (parity)22/W2Write-enable input for RAM IC 254NCNot connected23A4Address bus, bit 455/RASRow address strobe24NCNot connected56NCNot connected25A5Address bus, bit 557NCNot connected26D3Data input bus, bit 358QParity-check output27Q3Data output bus, bit 359/WWPWrite wrong parity28/W3Write-enable input for RAM IC 360PDCIParity daisy-chain input29A6Address bus, bit 661+5V+5 volts30NCNot connected62+5V+5 volts31A7Address bus, bit 763PDCOParity daisy-chain output32D4Data input bus, bit 464GNDGround

HP LaserJet 72-pin SIMMs with non-standard presence detect (PD) connections.

See also Dual in-line package (DIP) Single in-line package (SIP) Zig-zag in-line package (ZIP) Dual in-line memory module (DIMM)

References

External links

General SIMM Installation Guide